View MC44603PG_7677367.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

? semiconductor components industries, llc, 2004 february, 2004 ? rev. 3 358 publication order number: mc44603a/d ? fixed frequency, variable frequency, standby mode the mc44603a is an enhanced high performance controller that is specifically designed for off ? line and dc ? to ? dc converter applications. this device has the unique ability of automatically changing operating modes if the converter output is overloaded, unloaded, or shorted, offering the designer additional protection for increased system reliability. the mc44603a has several distinguishing features when compared to conventional smps controllers. these features consist of a foldback facility for overload protection, a standby mode when the converter output is slightly loaded, a demagnetization detection for reduced switching stresses on transistor and diodes, and a high current totem pole output ideally suited for driving a power mosfet. it can also be used for driving a bipolar transistor in low power converters (< 150 w). it is optimized to operate in discontinuous mode but can also operate in continuous mode. its advanced design allows use in current mode or voltage mode control applications. features ? pb ? free package is available* current or voltage mode controller ? operation up to 250 khz output switching frequency ? inherent feed forward compensation ? latching pwm for cycle ? by ? cycle current limiting ? oscillator with precise frequency control high flexibility ? externally programmable reference current ? secondary or primary sensing7 ? synchronization facility ? high current totem pole output ? undervoltage lockout with hysteresis safety/protection features ? overvoltage protection against open current and open voltage loop ? protection against short circuit on oscillator pin ? fully programmable foldback ? soft ? start feature ? accurate maximum duty cycle setting ? demagnetization (zero current detection) protection ? internally trimmed reference ? enhanced output drive greenline controller: low power consumption in standby mode ? low startup and operating current ? fully programmable standby mode ? controlled frequency reduction in standby mode ? low dv/dt for low emi radiations pin connections pdip ? 16 p suffix case 648 16 1 16 1 soic ? 16 dw suffix case 751g http://onsemi.com mc44603adw awlyyww mc44603ap awlyyww marking diagrams a = assembly location wl = wafer lot yy = year ww = work week see detailed ordering and shipping information in the package dimensions sect ion on page 378 of this data sheet. ordering information *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d.
mc44603a http://onsemi.com 359 maximum ratings rating symbol value unit total power supply and zener current (i cc + i z ) 30 ma supply voltage with respect to ground (pin 4) v c v cc 18 v output current (note 1) ma source i o(source) ? 750 sink i o(sink) 750 output energy (capacitive load per cycle) w 5.0 j r f stby , c t , soft ? start, r ref , r p stby inputs v in ? 0.3 to 5.5 v foldback input, current sense input, e/a output, voltage feedback input, overvoltage protection, synchronization input v in ? 0.3 to v cc + 0.3 v synchronization input high state voltage v ih v cc + 0.3 v low state reverse current v il ? 20 ma demagnetization detection input current ma source i demag ? ib (source) ? 4.0 sink i demag ? ib (sink) 10 error amplifier output sink current i e/a (sink) 20 ma power dissipation and thermal characteristics p suffix, dual ? in ? line, case 648 maximum power dissipation at t a = 85 c p d 0.6 w thermal resistance, junction ? to ? air r ja 100 c/w dw suffix, surface mount, case 751g maximum power dissipation at t a = 85 c p d 0.45 w thermal resistance, junction ? to ? air r ja 145 c/w operating junction temperature t j 150 c operating ambient temperature t a ? 25 to +85 c 1. maximum package power dissipation limits must be observed. 2. esd data available upon request.
mc44603a http://onsemi.com 360 electrical characteristics (v cc and v c = 12 v, (note 3), r ref = 10 k , c t = 820 pf, for typical values t a = 25 c, for min/max values t a = ? 25 to +85 c (note 4), unless otherwise noted.) characteristic symbol min typ max unit output section output voltage (note 5) v low state (i sink = 100 ma) low state (i sink = 500 ma) v ol ? ? 1.0 1.4 1.2 2.0 high state (i source = 200 ma) high state (i source = 500 ma) v oh ? ? 1.5 2.0 2.0 2.7 output volta g e durin g initialization phase v o l v output voltage during initialization phase v cc = 0 to 1.0 v, i sink = 10 a v ol ? ? 1.0 v v cc 0 to 1.0 v, i sink 10 a v cc = 1.0 to 5.0 v, i sink = 100 a v 5 0 t 13 v i 10 a ? 0.1 01 1.0 1.0 10 cc sink ? 0.1 1.0 output voltage rising edge slew ? rate (c l = 1.0 nf, t j = 25 c) dvo/dt ? 300 ? v/ s output voltage falling edge slew ? rate (c l = 1.0 nf, t j = 25 c) dvo/dt ? ? 300 ? v/ s error amplifier section voltage feedback input (v e/a out = 2.5 v) v fb 2.42 2.5 2.58 v input bias current (v fb = 2.5 v) i fb ? ib ? 2.0 ? 0.6 ? a open loop voltage gain (v e/a out = 2.0 to 4.0 v) a vol 65 70 ? db error amplifier section (continued) unity gain bandwidth bw mhz t j = 25 c ? 4.0 ? t j = ? 25 to +85 c ? ? 5.5 voltage feedback input line regulation (v cc = 10 to 15 v) v fbline ? reg ? 10 ? 10 mv output current ma sink (v e/a out = 1.5 v, v fb = 2.7 v) t a = ? 25 to +85 c i sink 2.0 12 ? source (v e/a out = 5.0 v, v fb = 2.3 v) t a = ? 25 to +85 c i source ? 2.0 ? ? 0.2 output voltage swing v high state (i e/a out (source) = 0.5 ma, v fb = 2.3 v) v oh 5.5 6.5 7.5 low state (i e/a out (sink) = 0.33 ma, v fb = 2.7 v) v ol ? 1.0 1.1 reference section reference output voltage (v cc = 10 to 15 v) v ref 2.4 2.5 2.6 v reference current range (i ref = v ref /r ref , r = 5.0 k to 25 k ) i ref ? 500 ? ? 100 a reference voltage over i ref range v ref ? 40 ? 40 mv oscillator and synchronization section frequency f osc khz t a = 0 to +70 c 44.5 48 51.5 t a = ? 25 to +85 c 44 ? 52 frequency change with voltage (v cc = 10 to 15 v) f osc / v ? 0.05 ? %/v 3. adjust v cc above the startup threshold before setting to 12 v. 4. low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. 5. v c must be greater than 5.0 v. 6. standby is disabled for v r p stby < 25 mv typical. 7. if not used, synchronization input must be connected to ground. 8. synchronization pulse width must be shorter than t osc = 1/f osc . 9. this function can be inhibited by connecting pin 8 to gnd. this allows a continuous current mode operation. 10. this function can be inhibited by connecting pin 5 to v cc . 11. the mc44603a can be shut down by connecting the soft ? start pin (pin 11) to ground.
mc44603a http://onsemi.com 361 electrical characteristics (continued) (v cc and v c = 12 v, (note 3), r ref = 10 k , c t = 820 pf, for typical values t a = 25 c, for min/max values t a = ? 25 to +85 c (note 4), unless otherwise noted.) characteristic unit max typ min symbol oscillator and synchronization section frequency change with temperature (t a = ? 25 to +85 c) f osc / t ? 0.05 ? %/ c oscillator voltage swing (peak ? to ? peak) v osc(pp) 1.65 1.8 1.95 v ratio charge current/reference current i charge /i ref ? t a = 0 to +70 c (v ct = 2.0 v) 0.375 0.4 0.425 t a = ? 25 to +85 c 0.37 ? 0.43 fixed maximum duty cycle = i discharge /(i discharge + i charge ) d 78 80 82 % ratio standby discharge current versus i r f stby (note 6) i disch ? stby / ? t a = 0 to +70 c i r f stby 0.46 0.53 0.6 t a = ? 25 to +85 c (note 8) 0.43 ? 0.63 v r f stby (i r f stby = 100 a) v r f stby 2.4 2.5 2.6 v frequency in standby mode (r f stby (pin 15) = 25 k ) f stby 18 21 24 khz current range i r f stby ? 200 ? ? 50 a synchronization input threshold voltage (note 7) v inthh v inthl 3.2 0.45 3.7 0.7 4.3 0.9 v synchronization input current i sync ? in ? 5.0 ? 0 a minimum synchronization pulse width (note 8) t sync ? ? 0.5 s undervoltage lockout section startup threshold v stup ? th 13.6 14.5 15.4 v output disable voltage after threshold turn ? on (uvlo 1) v disable1 v t a = 0 to +70 c 8.6 9.0 9.4 t a = ? 25 to +85 c 8.3 ? 9.6 reference disable voltage after threshold turn ? on (uvlo 2) v disable2 7.0 7.5 8.0 v demagnetization detection section (note 9) demagnetization detect input demagnetization comparator threshold (v pin 9 decreasing) v demag ? th 50 65 80 mv propagation delay (input to output, low to high) ? ? 0.25 ? s input bias current (v demag = 65 mv) i demag ? lb ? 0.5 ? ? a negative clamp level (i demag = ? 2.0 ma) c l(neg) ? ? 0.38 ? v positive clamp level (i demag = 2.0 ma) c l(pos) ? 0.72 ? v soft ? start section (note 11) ratio charge current/i ref i ss(ch) /i ref ? t a = 0 to +70 c 0.37 0.4 0.43 t a = ? 25 to +85 c 0.36 ? 0.44 discharge current (v soft ? start = 1.0 v) i discharge 1.5 5.0 ? ma clamp level v ss(cl) 2.2 2.4 2.6 v 3. adjust v cc above the startup threshold before setting to 12 v. 4. low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. 5. v c must be greater than 5.0 v. 6. standby is disabled for v r p stby < 25 mv typical. 7. if not used, synchronization input must be connected to ground. 8. synchronization pulse width must be shorter than t osc = 1/f osc . 9. this function can be inhibited by connecting pin 8 to gnd. this allows a continuous current mode operation. 10. this function can be inhibited by connecting pin 5 to v cc . 11. the mc44603a can be shut down by connecting the soft ? start pin (pin 11) to ground.
mc44603a http://onsemi.com 362 electrical characteristics (continued) (v cc and v c = 12 v, (note 3), r ref = 10 k , c t = 820 pf, for typical values t a = 25 c, for min/max values t a = ? 25 to +85 c (note 4), unless otherwise noted.) characteristic unit max typ min symbol soft ? start section (note 11) duty cycle (r soft ? start = 12 k ) duty cycle (v soft ? start (pin 11) = 0.1 v) d soft ? start 12k d soft ? start 36 ? 42 ? 49 0 % overvoltage section protection threshold level on v ovp v ovp ? th 2.42 2.5 2.58 v propagation delay (v ovp > 2.58 v to v out low) 1.0 ? 3.0 s protection level on v cc v cc prot v t a = 0 to +70 c 16.1 17 17.9 t a = ? 25 to +85 c 15.9 ? 18.1 input resistance ? k t a = 0 to +70 c 1.5 2.0 3.0 t a = ? 25 to +85 c 1.4 ? 3.4 foldback section (note 10) current sense voltage threshold (v foldback (pin 5) = 0.9 v) v cs ? th 0.86 0.89 0.9 v foldback input bias current (v foldback (pin 5) = 0 v) i foldback ? lb ? 6.0 ? 2.0 ? a standby section ratio i r p stby /i ref i r p stby /i ref ? t a = 0 to +70 c 0.37 0.4 0.43 t a = ? 25 to +85 c 0.36 ? 0.44 ratio hysteresis (v h required to return to normal operation from standby operation) v h /v r p stby ? t a = 0 to +70 c 1.42 1.5 1.58 t a = ? 25 to +85 c 1.4 ? 1.6 current sense voltage threshold (v r p stby (pin 12) = 1.0 v) v cs ? stby 0.28 0.31 0.34 v current sense section maximum current sense input threshold (v feedback (pin 14) = 2.3 v and v foldback (pin 6) = 1.2 v) v cs ? th 0.96 1.0 1.04 v input bias current i cs ? ib ? 10 ? 2.0 ? a propagation delay (current sense input to output at v th of mos transistor = 3.0 v) ? ? 120 200 ns total device power supply current i cc ma startup (v cc = 13 v with v cc increasing) ? 0.3 0.45 operating t a = ? 25 to +85 c (note 3) 13 17 20 power supply zener voltage (i cc = 25 ma) v z 18.5 ? ? v thermal shutdown ? ? 155 ? c 3. adjust v cc above the startup threshold before setting to 12 v. 4. low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. 5. v c must be greater than 5.0 v. 6. standby is disabled for v r p stby < 25 mv typical. 7. if not used, synchronization input must be connected to ground. 8. synchronization pulse width must be shorter than t osc = 1/f osc . 9. this function can be inhibited by connecting pin 8 to gnd. this allows a continuous current mode operation. 10. this function can be inhibited by connecting pin 5 to v cc . 11. the mc44603a can be shut down by connecting the soft ? start pin (pin 11) to ground.
mc44603a http://onsemi.com 363 figure 1. representative block diagram this device contains 243 active transistors.
mc44603a http://onsemi.com 364 figure 2. timing resistor versus oscillator frequency figure 3. standby mode timing capacitor versus oscillator frequency figure 4. oscillator frequency versus temperature figure 5. ratio charge current/reference current versus temperature figure 6. output waveform figure 7. output cross conduction
mc44603a http://onsemi.com 365 figure 8. oscillator discharge current versus temperature figure 9. source output saturation voltage versus load current figure 10. sink output saturation voltage versus sink current figure 11. error amplifier gain and phase versus frequency figure 12. voltage feedback input versus temperature figure 13. demag comparator threshold versus temperature
mc44603a http://onsemi.com 366 figure 14. current sense gain versus temperature figure 15. thermal resistance and maximum power dissipation versus p.c.b. copper length figure 16. propagation delay current sense input to output versus temperature figure 17. startup current versus v cc figure 18. supply current versus supply voltage figure 19. power supply zener voltage versus temperature
mc44603a http://onsemi.com 367 figure 20. startup threshold voltage versus temperature figure 21. disable voltage after threshold turn ? on (uvlo1) versus temperature figure 22. disable voltage after threshold turn ? on (uvlo2) versus temperature figure 23. protection threshold level on v ovp versus temperature figure 24. protection level on v cc versus temperature figure 25. propagation delay (v ovp > 2.58 v to v out low) versus temperature
mc44603a http://onsemi.com 368 figure 26. standby reference current versus temperature figure 27. current sense voltage threshold standby mode versus temperature pin function description pin name description 1 v cc this pin is the positive supply of the ic. the operating voltage range after startup is 9.0 to 14.5 v. 2 v c the output high state (v oh ) is set by the voltage applied to this pin. with a separate connection to the power source, it can reduce the effects of switching noise on the control circuitry. 3 output peak currents up to 750 ma can be sourced or sunk, suitable for driving either mosfet or bipolar tran- sistors. this output pin must be shunted by a schottky diode, 1n5819 or equivalent. 4 gnd the ground pin is a single return, typically connected back to the power source; it is used as control and power ground. 5 foldback input the foldback function provides overload protection. feeding the foldback input with a portion of the v cc voltage (1.0 v max) establishes on the system control loop a foldback characteristic allowing a smoother startup and sharper overload protection. above 1.0 v the foldback input is inactive. 6 overvoltage protection when the overvoltage protection pin receives a voltage greater than 17 v, the device is disabled and requires a complete restart sequence. the overvoltage level is programmable. 7 current sense input a voltage proportional to the current flowing into the power switch is connected to this input. the pwm latch uses this information to terminate the conduction of the output buffer when working in a current mode of operation. a maximum level of 1.0 v allows either current or voltage mode operation. 8 demagnetization detection a voltage delivered by an auxiliary transformer winding provides to the demagnetization pin an indication of the magnetization state of the flyback transformer. a zero voltage detection corresponds to complete core saturation. the demagnetization detection ensures a discontinuous mode of operation. this function can be inhibited by connecting pin 8 to gnd. 9 synchronization input the synchronization input pin can be activated with either a negative pulse going from a level between 0.7 v and 3.7 v to gnd or a positive pulse going from a level between 0.7 v and 3.7 v up to a level high- er than 3.7 v. the oscillator runs free when pin 9 is connected to gnd. 10 c t the normal mode oscillator frequency is programmed by the capacitor c t choice together with the r ref resistance value. c t , connected between pin 10 and gnd, generates the oscillator sawtooth. 11 soft ? start/d max / voltage ? mode a capacitor, resistor or a voltage source connected to this pin limits the switching duty ? cycle. this pin can be used as a voltage mode control input. by connecting pin 11 to ground, the mc44603a can be shut down. 12 r p standby a voltage level applied to the r p standby pin determines the output power level at which the oscillator will turn into the reduced frequency mode of operation (i.e. standby mode). an internal hysteresis comparator allows to return in the normal mode at a higher output power level. 13 e/a out the error amplifier output is made available for loop compensation. 14 voltage feedback this is the inverting input of the error amplifier. it can be connected to the switching power supply output through an optical (or other) feedback loop. 15 r f standby the reduced frequency or standby frequency programming is made by the r f standby resistance choice. 16 r ref r ref sets the internal reference current. the internal reference current ranges from 100 a to 500 a. this requires that 5.0 k r ref 25 k .
mc44603a http://onsemi.com 369 figure 28. starting behavior and overvoltage management figure 29. demagnetization ???????? ???????? ???????? ?? ?? ?? ??? ??? ???
mc44603a http://onsemi.com 370 figure 30. switching off behavior figure 31. oscillator ??? ???
mc44603a http://onsemi.com 371 figure 32. soft ? start & d max operating description error amplifier a fully compensated error amplifier with access to the inverting input and output is provided. it features a typical dc voltage gain of 70 db. the noninverting input is internally biased at 2.5 v and is not pinned out. the converter output voltage is typically divided down and monitored by the inverting input. the maximum input bias current with the inverting input at 2.5 v is ? 2.0 a. this can cause an output voltage error that is equal to the product of the input bias current and the equivalent input divider source resistance. the error amp output (pin 13) is provided for external loop compensation. the output voltage is offset by two diode drops ( 1.4 v) and divided by three before it connects to the inverting input of the current sense comparator. this guarantees that no drive pulses appear at the output (pin 3) when pin 13 is at its lowest state (v ol ). the error amp minimum feedback resistance is limited by the amplifier?s minimum source current (0.2 ma) and the required output voltage (v oh ) to reach the current sense comparator?s 1.0 v clamp level: r f(min) 3.0 (1.0 v) 1.4 v 0.2 ma 22 k figure 33. error amplifier compensation current sense comparator and pwm latch the mc44603a can operate as a current mode controller or as a voltage mode controller. in current mode operation, the mc44603a uses the current sense comparator. the output switch conduction is initiated by the oscillator and terminated when the peak inductor current reaches the
mc44603a http://onsemi.com 372 threshold level established by the error amplifier output (pin 13). thus, the error signal controls the peak inductor current on a cycle ? by ? cycle basis. the current sense comparator pwm latch ensures that only a single pulse appears at the source output during the appropriate oscillator cycle. the inductor current is converted to a voltage by inserting the ground referenced sense resistor r s in series with the power switch q1. this voltage is monitored by the current sense input (pin 7) and compared to a level derived from the error amp output. the peak inductor current under normal operating conditions is controlled by the voltage at pin 13 where: i pk v (pin 13) ? 1.4 v 3r s the current sense comparator threshold is internally clamped to 1.0 v. therefore, the maximum peak switch current is: i pk(max) 1.0 v r s figure 34. output totem pole series gate resistor, r2, will dampen any high frequency oscillations caused by the mosfet input capacitance and any series wiring inductance in the gate ? source circuit. diode d is required if the negative current into the output drive pin exceeds 15 ma. oscillator the oscillator is a very accurate sawtooth generator that can work either in free mode or in synchronization mode. in this second mode, the oscillator stops in the low state and waits for a demagnetization or a synchronization pulse to start a new charging cycle. ? the sawtooth generation: in the steady state, the oscillator voltage varies between about 1.6 v and 3.6 v. the sawtooth is obtained by charging and discharging an external capacitor c t (pin 10), using two distinct current sources = i charge and i discharge . in fact, c t is permanently connected to the charging current source (0.4 i ref ) and so, the discharge current source has to be higher than the charge current to be able to decrease the c t voltage (refer to figure 36). this condition is performed, its value being (2.0 i ref ) in normal working and (0.4 i ref + 0.5 i f stby in standby mode). figure 35. oscillator figure 36. simplified block oscillator two comparators are used to generate the sawtooth. they compare the c t voltage to the oscillator valley (1.6 v) and peak reference (3.6 v) values. a latch (l disch ) memorizes the oscillator state. in addition to the char ge and discharge cycles, a third state can exist. this phase can be produced when, at the end of the discharge phase, the oscillator has to wait for a synchronization or demagnetization pulse before restarting. during this delay, the c t voltage must remain equal to the oscillator valley value ( & 1.6 v). so, a third regulated current source i regul controlled by c osc regul , is connected to c t in order to perfectly compensate the (0.4 i ref ) current source that permanently supplies c t . the maximum duty cycle is 80%. indeed, the on ? time is allowed only during the oscillator capacitor charge.
mc44603a http://onsemi.com 373 consequently: t charge = c t x v/i charge t discharge = c t x v/i discharge where: t charge is the oscillator charge time v is the oscillator peak ? to ? peak value i charge is the oscillator charge current and t discharge is the oscillator discharge time i discharge is the oscillator discharge current so, as f s = 1 /(t charge + t discharge ) when the regul arrangement is not activated, the operating frequency can be obtained from the graph in figure 2. note: the output is disabled by the signal v osc prot when v ct is lower than 1.0 v (refer to figure 31). synchronization and demagnetization blocks to enable the output, the l osc latch complementary output must be low. reset is activated by the l disch output during the discharge phase. to restart, the l osc has to be set (refer to figure 35). to perform this, the demagnetization signal and the synchronization must be low. ? synchronization: the synchronization block consists of two comparators that compare the synchronization signal (external) to 0.7 and 3.7 v (typical values). the comparators? outputs are connected to the input of an and gate so that the final output of the block should be: ? high when 0.7 < sync < 3.7 v ? low in the other cases. as a low level is necessary to enable the output, synchronized low level pulses have to be generated on the output of the synchronization block. if synchronization is not required, the pin 9 must be connected to the ground. figure 37. synchronization ? demagnetization: in flyback applications, a good means to detect magnetic saturation of the transforme r core, or demagnetization, consists in using the auxiliary winding voltage. this voltage is: ? negative during the on ? time, ? positive during the off ? time, ? equal to zero for the dead ? time with generally some ? ringing (refer to figure 38). that is why, the mc44603a demagnetization detection consists of a comparator that can compare the auxiliary winding voltage to a reference that is typically equal to 65 mv. figure 38. demagnetization detection a diode d has been incorporated to clamp the positive applied voltages while an active clamping system limits the negative voltages to typically ? 0.33 v. this negative clamp level is sufficient to avoid the substrate diode switching on. in addition to the comparator, a latch system has been incorporated in order to keep the demagnetization block output level low as soon as a voltage lower than 65 mv is detected and as long as a new restart is produced (high level on the output) (refer to figure 39). this process prevents ringing on the signal at pin 8 from disrupting the demagnetization detection. this results in a very accurate demagnetization detection. the demagnetization block output is also directly connected to the output, disabling it during the demagnetization phase (refer to figure 34). note: the demagnetization detection can be inhibited by connecting pin 8 to the ground. figure 39. demagnetization block standby ? power losses in a classical flyback structure
mc44603a http://onsemi.com 374 figure 40. power losses in a classical flyback structure in a classical flyback (as depicted in figure 40), the standby losses mainly consist of the energy waste due to: ? the startup resistor r startup p startup ? the consumption of the ic and the power ? switch control p control ? the inrush current limitation resistor r icl p icl ? the switching losses in the power switch p sw ? the snubber and clamping network p sn ? cln p startup is nearly constant and is equal to: (v in ?v cc ) 2 r startup p icl only depends on the current drawn from the mains. losses can be considered constant. this waste of energy decreases when the standby losses are reduced. p control increases when the oscillator frequency is increased (each switching requires some energy to turn on the power switch). p sw and p sn ? cln are proportional to the switching frequency. consequently, standby losses can be minimized by decreasing the switching frequency as much as possible. the mc44603a was designed to operate at a standby frequency lower than the normal working one. ? standby power calculations with mc44603a during a switching period, the energy drawn by the transformer during the on ? time to be transferred to the output during the off ? time, is equal to: e 1 2 xlxi pk 2 where: ? l is the transformer primary inductor, ? l pk is the inductor peak current. input power is labelled p in : p in 0.5xlxi pk 2 xf s where f s is the normal working switching frequency. also, i pk v cs r s where r s is the resistor used to measure the power switch current. thus, the input power is proportional to v cs 2 (v cs being the internal current sense comparator input). that is why the standby detection is performed by creating a v cs threshold. an internal current source (0.4 x i ref ) sets the threshold level by connecting a resistor to pin 12. as depicted in figure 41, the standby comparator noninverting i nput voltage is typically equal to (3.0 x v cs + v f ) while the inverter input value is (v r p stby + v f ). figure 41. standby the v cs threshold level is typically equal to [(v r p stby )/3] and if the corresponding power threshold is labelled p thl : p thl 0.5 x l x v rpstby 3.0 r s 2 xf s and as: v rpstby r pstby x0.4xi ref r rpstby x0.4x v ref r ref r pstby 10.6 x r s xr ref v ref x p thl lxf s thus, when the power drawn by the converter decreases, v cs decreases and when v cs becomes lower than [v cs ? th x (v r p stby )/3], the standby mode is activated. this results in an oscillator discharge current reduction in order to increase the oscillator period and to diminish the switching frequency. as it is represented in figure 41, the (0.8 x i ref ) current source is disconnected and is replaced by a lower value one (0.25 x i f stby ). where: i f stby = v ref /r f stby
mc44603a http://onsemi.com 375 in order to prevent undesired mode switching when power is close to the threshold value, a hysteresis that is proportional to v r p stby is incorporated creating a second v cs threshold level that is equal to [2.5 x (v r p stby )/3]. when the standby comparator output is high, a second current source (0.6 x i ref ) is connected to pin 12. finally, the standby mode function can be shown graphically in figure 42. figure 42. dynamic mode change this curve shows that there are two power threshold levels: ? the low one: p thl fixed by v r p stby ? the high one: p thh (2.5) 2 xp thl x f stby f s p thh 6.25 x p thl x f stby f s maximum duty cycle and soft ? start control maximum duty cycle can be limited to values less than 80% by utilizing the d max and soft ? start control. as depicted in figure 43, the pin 11 voltage is compared to the oscillator sawtooth. figure 43. d max and soft ? start figure 44. maximum duty cycle control using the internal current source (0.4 i ref ), the pin 11 voltage can easily be set by connecting a resistor to this pin. if a capacitor is connected to pin 11, the voltage increases from 0 to its maximum value progressively (refer to figure 45), thereby, implementing a soft ? start. the soft ? start capacitor is discharged internally when the v cc (pin 1) voltage drops below 9.0 v. figure 45. different possible uses of pin 11 if no external component is connected to pin 11, an internal zener diode clamps the pin 11 voltage to a value v z that is higher than the oscillator peak value, disabling soft ? start and maximum duty cycle limitation. foldback as depicted in figures 33 and 49, the foldback input (pin 5) can be used to reduce the maximum v cs value, providing foldback protection. the foldback arrangement is a programmable peak current limitation. if the output load is increased, the required converter peak current becomes higher and v cs increases until it reaches its maximum value (normally, v cs max = 1.0 v). then, if the output load keeps on increasing, the system is unable to supply enough energy to maintain the output voltages in regulation. consequently, the decreasing output can be applied to pin 5, in order to limit the maximum peak current. in this way, the well known foldback characteristic can be obtained (refer to figure 46).
mc44603a http://onsemi.com 376 figure 46. foldback characteristic note: foldback is disabled by connecting pin 5 to v cc . overvoltage protection the overvoltage arrangement consists of a comparator that compares the pin 6 voltage to v ref (2.5 v) (refer to figure 47). if no external component is connected to pin 6, the comparator noninverting input voltage is nearly equal to: 2.0 k 11.6 k 2.0 k xv cc 2.0 k 11.6 k 2.0 k xv cc 2.5 v the comparator output is high when: ' v cc 17 v a delay latch (2.0 s) is incorporated in order to sense overvoltages that last at least 2.0 s. if this condition is achieved, v ovp out , the delay latch output, becomes high. as this level is brought back to the input through an or gate, v ovp out remains high (disabling the ic output) until v ref is disabled. consequently, when an overvoltage longer than 2.0 s is detected, the output is disabled until v cc is removed and then re ? applied. the v cc is connected after v ref has reached steady state in order to limit the circuit startup consumption. the overvoltage section is enabled 5.0 s after the regulator has started to allow the reference v ref to stabilize. by connecting an external resistor to pin 6, the threshold v cc level can be changed. figure 47. overvoltage protection undervoltage lockout section figure 48. v cc management as depicted in figure 48, an undervoltage lockout has been incorporated to guarantee that the ic is fully functional before allowing system operation. this block particularly, produces v ref (pin 16 voltage) and i ref that is determined by the resistor r ref connected between pin 16 and the ground: i ref v ref r ref where v ref 2.5 v (typically) another resistor is connected to the reference block: r f stby that is used to fix the standby frequency. in addition to this, v cc is compared to a second threshold level that is nearly equal to 9.0 v (v disable1 ). uvlo1 is generated to reset the maximum duty cycle and soft ? start block disabling the output stage as soon as v cc becomes lower than v disable1 . in this way, the circuit is reset and made ready for the next startup, before the reference block is disabled (refer to figure 30). finally, the upper limit for the minimum normal operating voltage is 9.4 v (maximum value of v disable1 ) and so the minimum hysteresis is 4.2 v. ((v stup ? th ) min = 13.6 v). the large hysteresis and the low startup current of the mc44603a make it ideally suited for off ? line converter applications where ef ficient bootstrap startup techniques are required.
mc44603a http://onsemi.com 377 figure 49. 250 w input power off ? line flyback converter with mosfet switch mc44603ap * diode d15 is required if the negative current into the output pin exceeds 15 ma.
mc44603a http://onsemi.com 378 250 w input power fly ? back converter 185 v ? 270 v mains range mc44603ap & mtp6n60e tests conditions results line regulation 150 v 1 30 v 1 14 v 7.0 v v in = 185 vac to 270 vac f mains = 50 hz i out = 0.6 a i out = 2.0 a i out = 2.0 a i out = 2.0 a 10 mv 10 mv 10 mv 20 mv load regulation 150 v v in = 220 vac i out = 0.3 a to 0.6 a 50 mv cross regulation 150 v v in = 220 vac i out (150 v) = 0.6 a i out (30 v) = 0 a to 2.0 a i out (14 v) = 2.0 a i out (7.0 v) = 2.0 a < 1.0 mv efficiency v in = 220 vac, p in = 250 w 81% standby mode p input switching frequency v in = 220 vac, p out = 0 w 3.3 w 20 khz fully stable output short circuit p out (max) = 270 w safe on all outputs startup p in = 250 w vac = 160 v device ordering information device operating temperature range package shipping ? mc44603p pdip ? 16 25 units / rail mc44603adw soic ? 16 47 units / rail mcrr602adwr2 ta = ? 25 c to +85 c soic ? 16 1000 / tape & reel mc44603apg soic ? 16 (pb ? free) 25 units / rail ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.

▲Up To Search▲

Price & Availability of MC44603PG

	To Download MC44603PG Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .